The bonding of the chip to the package substrate is a critical stage in the assembly of any power discrete device. In order to verify the integrity of the bond a transient thermal test is performed.

A temperature sensitive device parameter is measured using a calibration pulse, a controlled high power pulse is then applied and the temperature sensitive parameter is re-measured immediately following the end of the power pulse. The deference of the device temperature for a given power pulse is used to determine the transient thermal resistance of the package and to verify the mount down process.

For a MOSFET device, the on-state voltage of the body drain diode (V_SD) is usually used to determine the junction temperature. The power pulse is then applied to the device in the active state and the deference in V_SD (delta V_SD or dV_SD) is used to determine the temperature rise of the junction.

The ipTEST thermal test generator (FB) supplies DC power (to 1000 W, up to 300 V and up to 100 A) the gate/base drive (30 V, 10 A compliance) and the precision calibration and measurement systems all controlled on a separate test site from a local micro-controller.